45-nm feasibility A Comprehensive Review of SRAM Design Using Modified Gate Diffusion Input (MGDI)

Abstract

This paper presents a systematic literature review on the feasibility and practicality of implementing Modified Gate Diffusion Input (MGDI) logic for a static random access memory
(SRAM) design at the 45-nm technology node. The study consolidates prior simulation-based and analytical findings to evaluate MGDI as a low-power alternative to conventional CMOS in memory circuits. Results highlight that MGDI enables significant reductions in dynamic power consumption, particularly in peripheral circuits such as decoders and drivers, where switching activity dominates. Average leakage power was also reduced by approximately 20%, with up to a 40% reduction observed in stacked configurations, owing to the intrinsic characteristics of MGDI structures. Stability analysis indicated that hold Static Noise Margin (SNM) remained comparable to CMOS cells, while read SNM improved by 5–10% due to the stacking effect and the use of swing-restoration transistors. A moderate delay penalty of about 10% was identified at the bit-cell level, but the difference was offset
by faster operation in MGDI-based peripheral circuits, resulting in improved energy-delay efficiency overall. Importantly, MGDI can be fabricated using standard CMOS processes without requiring exotic modifications, demonstrating practical compatibility. These findings suggest that MGDI is a promising candidate for ultra-low-power memory applications, particularly in Internet of Things (IoT) and energy-harvesting devices.